题解 | #异步复位的串联T触发器#

`timescale 1ns/1ns
module Tff_2 (
input wire data, clk, rst,
output reg q  
);
//*************code***********//
reg p;
always @(posedge clk or negedge rst) begin 
    if(!rst) begin 
        p <= 1'b0;
    end
    else if (data) begin 
        p <= ~p;
    end
    else  begin 
        p <= p;
    end
end

always @(posedge clk or negedge rst) begin 
    if(!rst) begin 
        q <= 1'b0;
        p <= 1'b0;
    end
    else if (p) begin 
        q <= ~q;
    end
    else  begin 
        q <= q;
    end
end

//*************code***********//
endmodule