题解 | #4bit超前进位加法器电路#

`timescale 1ns/1ns

module lca_4(
	input		[3:0]       A_in  ,
	input	    [3:0]		B_in  ,
    input                   C_1   ,
 
 	output	 wire			CO    ,
	output   wire [3:0]	    S
);
    
wire	[3:0]	G,P;
wire	[4:0]	C;
wire	[3:-1]	C_temp;

assign	CO = C[4];
assign	C[0] = C_1;

generate
	genvar	i;
	for(i=0;i<4;i=i+1)
	begin:	block1
		assign	G[i] = A_in[i] & B_in[i];
		assign	P[i] = A_in[i] ^ B_in[i];
		assign	C[i+1] = G[i] | (P[i] & C[i]);
		assign	C_temp[i-1] = C[i];
		assign	S[i] = P[i] + C_temp[i-1];
	end
endgenerate

endmodule