题解 | 占空比50%的奇数分频

`timescale 1ns / 1ns

module odo_div_or (
    input  wire rst,
    input  wire clk_in,
    output wire clk_out7
);

    //*************code***********//
    reg [2:0] cnt_p, cnt_n;
    reg clk_p, clk_n;
    assign clk_out7 = clk_p | clk_n;
    always @(posedge clk_in or negedge rst) begin
        if (!rst) begin
            cnt_p <= 0;
        end else if (cnt_p == 'd6) begin
            cnt_p <= 0;
        end else begin
            cnt_p <= cnt_p + 1;
        end
    end
    always @(posedge clk_in or negedge rst) begin
        if (!rst) begin
            clk_p <= 0;
        end else if (cnt_p == 'd3) begin
            clk_p <= 1;
        end else if (cnt_p == 'd6) begin
            clk_p <= 0;
        end
    end
    always @(negedge clk_in or negedge rst) begin
        if (!rst) begin
            cnt_n <= 0;
        end else if (cnt_n == 'd6) begin
            cnt_n <= 0;
        end else begin
            cnt_n <= cnt_n + 1;
        end
    end
    always @(negedge clk_in or negedge rst) begin
        if (!rst) begin
            clk_n <= 0;
        end else if (cnt_n == 'd3) begin
            clk_n <= 1;
        end else if (cnt_n == 'd6) begin
            clk_n <= 0;
        end
    end
    //*************code***********//
endmodule

注意两个边界条件：中点(7-1)>>2=3处的01转变和cnt=6时的10转变