题解 | 4bit超前进位加法器电路

`timescale 1ns/1ns

module lca_4(
	input		[3:0]       A_in  ,
	input	    [3:0]		B_in  ,
    input                   C_1   ,
 
 	output	 wire			CO    ,
	output   wire [3:0]	    S
);
	wire [3:0]P;
	wire [3:0]G;
	wire [3:0]C;

	
	assign G = A_in & B_in ;//A与B，A和B都是1时产生进位
	assign P = A_in ^ B_in ;//A异或B，A和B中只有一个是1时，该位sum为1
	assign C[0] = C_1;
	assign C[1] = G[0] | (P[0] & C[0] );
	assign C[2] = G[1] | (P[1] & C[1] );
	assign C[3] = G[2] | (P[2] & C[2] );
	assign CO   = G[3] | (P[3] & C[3] );

	assign S   = C ^ P ;



	

endmodule