时钟无毛刺切换
module change_glitch_free(
input clk1 ,
input clk0 ,
input sel ,
input rstn ,
output outclk
);
//倍数关系
reg out1;
reg out0;
always@(negedge clk1 or negedge rstn)begin
if(!rstn)begin
out1 <= 0;
end
else begin
out1 <= ~out0 & sel;
end
end
always@(negedge clk0 or negedge rstn)begin
if(!rstn)begin
out0 <= 0;
end
else begin
out0 <= ~out1 & ~sel;
end
end
assign outclk = (out1 & clk1) | (out0& clk0);
/*
//异步时序
reg out1;
reg out1_r;
reg out0;
reg out0_r;
always@(posedge clk1 or negedge rstn)begin
if(!rstn)begin
out1_r<= 0;
end
else begin
out1_r <= ~out0 & sel;
end
end
always@(posedge clk0 or negedge rstn)begin
if(!rstn)begin
out0_r <= 0;
end
else begin
out0_r <= ~out1 & ~sel;
end
end
always@(negedge clk1 or negedge rstn)begin
if(!rstn)begin
out1 <= 0;
end
else begin
out1 <= out1_r;
end
end
always@(negedge clk0 or negedge rstn)begin
if(!rstn)begin
out0 <= 0;
end
else begin
out0 <= out0_r;
end
end
assign outclk = (out1 & clk1) | (out0& clk0);
*/
endmodule
