题解 | #流水线乘法器#

`timescale 1ns/1ns

module multi_pipe#(
	parameter size = 4
)(
	input 						clk 		,   
	input 						rst_n		,
	input	[size-1:0]			mul_a		,
	input	[size-1:0]			mul_b		,
 
 	output	reg	[size*2-1:0]	mul_out		
);

wire [size*2-1:0] mul_out_1;
wire [size*2-1:0] mul_out_2;
wire [size*2-1:0] mul_out_3;
wire [size*2-1:0] mul_out_4;
wire [size*2-1:0] mul_out_all;

reg [size*2-1:0] mul_a_reg;
reg [size*2-1:0] mul_b_reg;
always @(posedge clk or negedge rst_n)begin
	if(!rst_n)begin
		mul_a_reg <= 0;
		mul_b_reg <= 0;
	end
	else begin
		mul_a_reg <= mul_a;
		mul_b_reg <= mul_b;
	end
end

assign mul_out_1 = mul_b_reg[0] ? mul_a_reg : 0;
assign mul_out_2 = mul_b_reg[1] ? {mul_a_reg,1'b0} : 0;
assign mul_out_3 = mul_b_reg[2] ? {mul_a_reg,2'b00}  : 0;
assign mul_out_4 = mul_b_reg[3] ? {mul_a_reg,3'b000}  : 0;
assign mul_out_all = mul_out_1 + mul_out_2 + mul_out_3 + mul_out_4;

always @(posedge clk or negedge rst_n)begin
	if(!rst_n)begin
		mul_out <= 0;
	end
	else begin
		mul_out <= mul_out_all;
	end
end


endmodule