题解 | #移位运算与乘法#

`timescale 1ns/1ns
module multi_sel(
input [7:0]d ,
input clk,
input rst,
output reg input_grant,
output reg [10:0]out
);
//*************code***********//
reg [2:0] mux_cnt;
reg [7:0] d_temp;
always@(posedge clk or negedge rst) begin
    if(!rst) begin
        mux_cnt <= 3'd0;
    end
    else if(mux_cnt == 3'd3) begin
        mux_cnt <= 3'd0;
    end
    else begin
        mux_cnt <= mux_cnt + 1'd1;
    end
end
always@(posedge clk or negedge rst) begin
    if(!rst) begin
        d_temp <= 8'd0;
        input_grant <= 1'd0;
    end
    else if(mux_cnt == 3'd0) begin
        d_temp <= d;
        input_grant <= 1'd1;
    end
    else begin
        d_temp <= d_temp;
        input_grant <= 1'd0;
    end
end
always@(posedge clk or negedge rst) begin
    if(!rst) begin
        out <= 11'd0;
    end
    else if(mux_cnt == 3'd0) begin
        out <= d;
    end
    else if(mux_cnt == 3'd1) begin
        out <= d_temp*3;
    end
    else if(mux_cnt == 3'd2) begin
        out <= d_temp*7;
    end
    else if(mux_cnt == 3'd3) begin
        out <= d_temp*8;
    end
    else begin
        out <= 11'd0;
    end
end

//*************code***********//
endmodule