题解 | 4bit超前进位加法器电路

先实现一位全加器(Full Adder, FA)，再通过级联实现4bit行波前进加法器(Ripple-Carry Adder, RCA)

`timescale 1ns/1ns

module lca_4(
	input		[3:0]       A_in  ,
	input	    [3:0]		B_in  ,
    input                   C_1   ,
 
 	output	 wire			CO    ,
	output   wire [3:0]	    S
);

wire [4:0] myco;
wire [3:0] mys;

// fadd fadd1(.a(A_in[0]),.b(B_in[0]),.ci(myco[0]),.co(myco[1]),.s(mys[0]));
// fadd fadd2(.a(A_in[1]),.b(B_in[1]),.ci(myco[1]),.co(myco[2]),.s(mys[1]));
// fadd fadd3(.a(A_in[2]),.b(B_in[2]),.ci(myco[2]),.co(myco[3]),.s(mys[2]));
// fadd fadd4(.a(A_in[3]),.b(B_in[3]),.ci(myco[3]),.co(myco[4]),.s(mys[3]));

genvar i;
generate
	for(i=0; i<4; i=i+1)begin:label
		fadd fadd1(
			.a(A_in[i]),
			.b(B_in[i]),
			.ci(myco[i]),
			.co(myco[i+1]),
			.s(mys[i])
		);
	end
endgenerate

assign myco[0] = C_1;
assign S = mys;
assign CO = myco[3];

endmodule

module fadd(
	input a,
	input b,
	input ci,

	output co,
	output s
);

assign s = a ^ b ^ ci;
assign co = ( a & b ) | ( (a ^ b) & ci );

endmodule