题解 | #多位信号xnor#

`timescale 1ns/1ns

module top_module(
    input a, b, c, d, e,
	output [24:0] out
);

wire    [24:0]tp1,tp2;
assign  tp1[24:0] = {{5{a}},{5{b}},{5{c}},{5{d}},{5{e}}};
assign  tp2[24:0] = {5{a,b,c,d,e}};

//assign  out = ~(tp1^tp2);
genvar i;
generate
    for(i=0;i<25;i=i+1)begin
        assign out[i] = (tp1[i]==tp2[i])?1'b1:1'b0;
    end
endgenerate

endmodule