题解 | #异步复位同步释放#

`timescale 1ns/1ns

module ali16(
input clk,
input rst_n,
input d,
output reg dout
 );

reg rst_n_r,rst_n_r1;
//*************code***********//
always@(posedge clk, negedge rst_n)
if(rst_n == 1'b0) begin
    rst_n_r <= 1'b0;
    rst_n_r1 <= 1'b0;
end
else begin
    rst_n_r <= 1'b1;
    rst_n_r1 <= rst_n_r;
end

always@(posedge clk, negedge rst_n_r1)
if(rst_n_r1 == 1'b0) 
    dout <= 1'b0;
else 
    dout <= d;


/*
always@(posedge clk, negedge rst_n)
if(rst_n == 1'b0) 
    rst_n_r <= 1'b0;
else
    rst_n_r <= 1'b1;

always@(posedge clk, negedge rst_n_r)
if(rst_n_r == 1'b0) begin
    dout <= 1'b0;
end
else if(rst_n_r == 1'b1) begin
    dout <= d;
end
*/
/*
else begin
    dout <= dout;
    rst_n_r <= 1'b0;
end
*/
//*************code***********//
endmodule

注意rst信号一定要打两拍，因为需要确保rst信号拉高（无效）之后，复位信号rst_n_r1也能至少维持一拍有效，等到下一个时钟边沿再拉高（无效）,保证寄存器不会在复位撤销的时钟边沿采样