题解 | #根据状态转移表实现时序电路#
根据状态转移表实现时序电路
https://www.nowcoder.com/practice/455c911bee0741bf8544a75d958425f7
`timescale 1ns/1ns module seq_circuit( input A , input clk , input rst_n, output wire Y ); parameter [1:0] s_00 = 2'b00, s_01 = 2'b01, s_10 = 2'b10, s_11 = 2'b11; reg [1:0] Q; assign Y = & Q; always@(posedge clk or negedge rst_n) if(!rst_n) Q <= s_00; else case(Q) s_00 : if(A) Q <= s_11; else Q <= s_01; s_01 : if(A) Q <= s_00; else Q <= s_10; s_10 : if(A) Q <= s_01; else Q <= s_11; s_11 : if(A) Q <= s_10; else Q <= s_00; default : Q <= s_00; endcase endmodule