题解 | #实现3-8译码器①#

3-8 译码器 。下面文件讲解的很详细。字面意思：通过A3,A2,A1来选择Y0-Y7其中一个支路。

链接SNx4HC138 3线路至8线路解码器/多路信号分离器

8.1 Overview The SNx4HC138 devices are 3-to-8 decoders and demultiplexers. The three input pins, A, B, and C, select which output is active. The selected output is pulled LOW, while the remaining outputs are all HIGH. The conditions at the binary-select inputs at the three enable inputs select one of eight output lines. Two active-low and one active-high enable inputs reduce the requirement for external gates or inverters when expanding. A 24- line decoder can be implemented without external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications.

`timescale 1ns/1ns

module decoder_38(
   input             E1_n   ,
   input             E2_n   ,
   input             E3     ,
   input             A0     ,
   input             A1     ,
   input             A2     ,
   
   output wire       Y0_n   ,  
   output wire       Y1_n   , 
   output wire       Y2_n   , 
   output wire       Y3_n   , 
   output wire       Y4_n   , 
   output wire       Y5_n   , 
   output wire       Y6_n   , 
   output wire       Y7_n   
);

    wire E ;

    assign E = ~E1_n & ~E2_n & E3;
    assign Y0_n = ~(E & ~A2 & ~A1 & ~A0);
    assign Y1_n = ~(E & ~A2 & ~A1 & A0);
    assign Y2_n = ~(E & ~A2 & A1 & ~A0);
    assign Y3_n = ~(E & ~A2 & A1 & A0);
    assign Y4_n = ~(E & A2 & ~A1 & ~A0);
    assign Y5_n = ~(E & A2 & ~A1 & A0);
    assign Y6_n = ~(E & A2 & A1 & ~A0);
    assign Y7_n = ~(E & A2 & A1 & A0);    

endmodule