题解 | #编写乘法器求解算法表达式#

`timescale 1ns/1ns

module calculation(
	input clk,
	input rst_n,
	input [3:0] a,
	input [3:0] b,
	output [8:0] c
);
wire [8:0] c1;
wire [8:0] c2;

multiplexer multiplexer1 (
	.clk(clk),
	.rst_n(rst_n),
	.a(a),
	.b('d12),
	.c(c1)
);

multiplexer multiplexer2 (
	.clk(clk),
	.rst_n(rst_n),
	.a(b),
	.b('d5),
	.c(c2)
);

assign c = c1 + c2;

endmodule


module multiplexer (
	input clk,
	input rst_n,
	input [3:0] a,
	input [3:0] b,
	output [8:0] c
);
wire [6:0] temp0;
wire [6:0] temp1;
wire [6:0] temp2;
wire [6:0] temp3;
reg [7:0] add1;
reg [7:0] add2;
reg [8:0] c_r;

assign temp0 = b[0] ? {3'b0, a} : 'd0;
assign temp1 = b[1] ? {2'b0, a, 1'b0} : 'd0;
assign temp2 = b[2] ? {1'b0, a, 2'b0} : 'd0;
assign temp3 = b[3] ? {a, 3'b0} : 'd0;

always @ (posedge clk or negedge rst_n) begin
	if(!rst_n) begin
		add1 <= 'd0;
		add2 <= 'd0;
		c_r <= 'd0;
	end
	else begin
		add1 <= temp0 + temp1;
		add2 <= temp2 + temp3;
		c_r <= add1 + add2;
	end
end

assign c = c_r;

endmodule