题解 | #Johnson Counter#

`timescale 1ns/1ns

module JC_counter(
   input                clk ,
   input                rst_n,
 
   output reg [3:0]     Q  
);

reg [2:0] count;

always @(posedge clk or negedge rst_n)begin
    if(!rst_n)begin
        count <= 3'b000;
    end
    else begin
        count <= count + 1;
    end
end

always @(posedge clk or negedge rst_n)begin
    if(!rst_n)begin
        Q <= 4'b0000;
    end
    else begin
        case(count)
        3'b000:Q <= 4'b1000;
        3'b001:Q <= 4'b1100;
        3'b010:Q <= 4'b1110;
        3'b011:Q <= 4'b1111;
        3'b100:Q <= 4'b0111;
        3'b101:Q <= 4'b0011;
        3'b110:Q <= 4'b0001;
        3'b111:Q <= 4'b0000;
        endcase
    end
end


endmodule