题解 | #任意小数分频#

`timescale 1ns/1ns

module div_M_N(
     input      clk_in,
     input      rst,
     output     clk_out
);
   
    localparam CNT_MAX = 89;
    localparam CNT_SW_EO = 24;
    localparam CNT_EVEN = 8;
    localparam CNT_ODD = 9;

    reg [6:0] cnt_in;
    always@(posedge clk_in or negedge rst)begin
        if(!rst)
            cnt_in <= 7'd0;
        else if(cnt_in == CNT_MAX-1)
            cnt_in <= 7'd0;
        else
            cnt_in <= cnt_in + 1'b1;
    end

    reg div_flag;
    always@(posedge clk_in or negedge rst)begin
        if(!rst)
            div_flag <= 1'b0;
        else if(cnt_in == CNT_SW_EO-1 || cnt_in == CNT_MAX-1)
            div_flag <= ~div_flag;
        else
            div_flag <= div_flag;
    end

    reg [3:0] cnt_div;
    always@(posedge clk_in or negedge rst)begin
        if(!rst)
            cnt_div <= 4'd0;
        else if(~div_flag)
            cnt_div <= (cnt_div == CNT_EVEN-1) ? 4'd0 : cnt_div + 1'b1;
        else
            cnt_div <= (cnt_div == CNT_ODD-1) ? 4'd0 : cnt_div + 1'b1;
    end

    assign clk_out = cnt_div <= CNT_EVEN/2 && cnt_div != 0;

endmodule

思路：基本与高赞评论一致。

整体：

偶分频部分（div_flag为低）：

奇分频部分（div_flag为高，不要求50%占空比）：