题解 | #使用子模块实现三输入数的大小比较#

`timescale 1ns/1ns
module comparator(
	input[7:0] data_a,
	input[7:0] data_b,
	input clk,
	input rst_n,
	output reg [7:0]c
);
	always@(posedge clk or negedge rst_n)begin
		if(!rst_n)
			c<=8'b0;
		else 
			c<=(data_a>data_b)?data_b:data_a;
	end
endmodule

module main_mod(
	input clk,
	input rst_n,
	input [7:0]a,
	input [7:0]b,
	input [7:0]c,
	
	output [7:0]d
);
wire [7:0]tmp1;
wire [7:0]tmp2;
comparator comparator1(
.data_a(a),
.data_b(b),
.clk(clk),
.rst_n(rst_n),
.c(tmp1)  
);

comparator comparator2(
.data_a(a),
.data_b(c),
.clk(clk),
.rst_n(rst_n),
.c(tmp2)  
);

comparator comparator3(
.data_a(tmp1),
.data_b(tmp2),
.clk(clk),
.rst_n(rst_n),
.c(d)  
);
endmodule