题解 | #优先编码器电路①#

`timescale 1ns/1ns

module encoder_0(
   input      [8:0]         I_n   ,
   
   output reg [3:0]         Y_n   
);
    reg [8:0] I;

    wire [8:0] I_nn = ~I_n;

    integer i;
    always@(*) begin
        for(i=0;i<9;i++)
            I[i] = I_nn[8-i];
    end

    wire [8:0]  one_hot = I & (~(I)+1'b1);

always@(*) begin
     Y_n[0] = ~(one_hot[8] | one_hot[6] | one_hot[4] | one_hot[2] | one_hot[0]);
     Y_n[1] = ~(one_hot[6] | one_hot[5] | one_hot[2] | one_hot[1] );
     Y_n[2] = ~(one_hot[4] | one_hot[3] | one_hot[2] | one_hot[1]);
     Y_n[3] = ~ one_hot[0] ;
end

endmodule

牛客的题真的··········能不能好好校对一下