题解 | #简易秒表#
简易秒表
https://www.nowcoder.com/practice/6493ca8c7b67499f918e1fa33b4cdeda
`timescale 1ns/1ns
module count_module(
input clk,
input rst_n,
output reg [5:0]second,
output reg [5:0]minute
);
always@(posedge clk or negedge rst_n) begin
if(!rst_n) begin
second <= 0;
minute <= 0;
end
else if(minute<60)begin
if(second==60) begin
minute <= minute + 1;
second <= 1;
end
else begin
minute <= minute;
second <= second + 1;
end
end
else begin
minute <= minute;
second <= second;
end
end
endmodule
