题解 | #自动贩售机2#

`timescale 1ns/1ns

module seller2(
	input wire clk  ,
	input wire rst  ,
	input wire d1 ,
	input wire d2 ,
	input wire sel ,
	
	output reg out1,
	output reg out2,
	output reg out3
);
//*************code***********//
reg [2:0] money;
always@(posedge clk or negedge rst) begin
	if(!rst) money <= 0;
	else if(sel) money <= (money>=3'd5)? 0 : money + {d2,d1};
	else money <= (money>=3'd3)? 0 : money + {d2,d1};
end
always@(posedge clk or negedge rst) begin
	if(!rst) begin
		out1 <= 0;
		out2 <= 0;
		out3 <= 0;
	end
	else case({sel,money})
		4'b0011: begin 
			out1 <= 1;
			out3 <= 0;
		end
		4'b0100: begin 
			out1 <= 1;
			out3 <= 1;
		end
		4'b1101: begin 
			out2 <= 1;
			out3 <= 0;
		end
		4'b1110: begin 
			out2 <= 1;
			out3 <= 1;
		end
		default: begin
			out1 <= 0;
			out2 <= 0;
			out3 <= 0;
		end
		endcase
end

//*************code***********//
endmodule