像素设计工程师

Responsibilities  参与CMOS图像传感器像素结构的设计与优化，提升光电转换效率、噪声性能和动态范围；  Design and optimize CMOS image sensor pixel structures to improve quantum efficiency, noise performance, and dynamic range.  使用EDA工具（如Cadence Virtuoso）进行电路仿真和版图设计；  Perform circuit simulation and layout design using EDA tools (e.g., Cadence Virtuoso)  分析测试数据，优化像素性能，并撰写技术文档；  Analyze test data, optimize pixel performance, and document technical findings.  与工艺团队协作，确保设计与制造工艺的兼容性；  Collaborate with process engineers to ensure design compatibility with fabrication processes..  跟踪行业最新技术趋势，参与创新像素架构的研究；  Stay updated with industry trends and contribute to research on innovative pixel architectures.

Requirements  微电子学、电子工程或相关专业硕士/博士学历；  Master’s/PhD in Microelectronics, EE or related fields.  熟练使用EDA工具（Cadence、HSPICE、Silvaco等）；  Proficiency in EDA tools (Cadence, HSPICE, Silvaco, etc.).  具备良好的问题分析能力和团队协作精神；  Strong problem-solving skills and teamwork mindset..  英语读写能力良好，能阅读技术文献；  Proficient in English for technical documentation Preferred  有跨文化的技术团队协作经验者优先；  Having experience in cross-cultural technical team collaboration is a plus.  英语听写熟练，可作为工作语言者优先。  Being fluent in verbal and written English and able to use English as working language is a plus.