IC验证工程师

芯片验证工程师(MTS/SMTS/PMTS) DV Engineer THE ROLE: AMD team is looking for a MTS/SMTS/PMTS verification engineer responsible for verification deliveries for AMD future products. He/she will be a technical member in verification team and co-work with different functional teams (Architect, Algorithm, Design, Firmware, etc.) to deliver AMD subsystem solutions for CPU/ APU/GPU. He/she will have the opportunity to work with smart teammates to develop a chip from end to end and touch industry-advanced design verification flows, methodologies, and knowledge. THE PERSON: Be good at communication and teamwork, self-motivated and with good work ethics. KEY RESPONSIBILITIES: • Work with architects on verification strategy setup • Lead several team members to sign off IP/SOC regression/coverage to make product time to market on time • Collaborate with global team on implementation of multiple function domains like Firmware, Formal, Power, Performance verification • Build re-usable components and infrastructure that can be re-used for upper-level verification env such as Subsystem or SOC • Be involved technically system features discussion and share productive ideas from System level perspective for DACC verification strategy • Create IP level test plan • Develop test sequence for IP features • Coaches and mentor junior staff

PREFERRED EXPERIENCE: • Complex IP Design Verification, direct experience in IP/SOC or Processor (CPU or GPU) • Good knowledge of at least one verification methodology. UVM is preferred • Good knowledge of Verilog/C/C++/System C/System Verilog. • Verification insights into random techniques. • Experience of verification lead is an asset. • Verification of Virtualization is an asset. • Good at both Oral English and written English ACADEMIC CREDENTIALS: • M.S. or B.S. in EE or equivalent, with 3-10 years’ experience in digital ASIC/SOC design verification LOCATION: Shanghai/Beijing