题解 | 自动贩售机1

`timescale 1ns/1ns
module seller1(
	input wire clk  ,
	input wire rst  ,
	input wire d1 ,
	input wire d2 ,
	input wire d3 ,
	
	output reg out1,
	output reg [1:0]out2
);
//*************code***********//
reg [3:0] cnt;
always @(posedge clk or negedge rst)begin
	if(!rst)begin
		cnt <= 0;
	end
	else begin
		if( cnt < 3)begin
			if(d1)begin
				cnt <= cnt + 1;
			end
			else if(d2)begin
				cnt <= cnt + 2;
			end
			else if(d3)begin
				cnt <= cnt + 4;
			end
		end
		else begin
			cnt <= 0;
		end	
	end
end

always @(posedge clk or negedge rst)begin
	if(!rst)begin
		out1 <= 0;
	end
	else if(cnt >= 3)begin
		out1 <= 1;
	end
	else begin
		out1 <= 0;
	end
end

always @(posedge clk or negedge rst)begin
	if(!rst)begin
		out2 <= 0;
	end
	else if(cnt >= 3)begin
		out2 <= cnt - 3;
	end
	else begin
		out2 <= 0;
	end
end

//*************code***********//
endmodule