题解 | #移位运算与乘法#

`timescale 1ns/1ns
module multi_sel(
input [7:0]d ,
input clk,
input rst,
output reg input_grant,
output reg [10:0]out
);
//*************code***********//
parameter   s1 = 'b0000,
            s3 = 'b0010,
            s7 = 'b0100,
            s8 = 'b1000;
reg [7:0]   r_d ;
reg[3:0]    state;
always@(posedge clk or negedge rst)begin
    if(!rst)begin
        state    <= s1;
        r_d      <= 'd0;
        input_grant<='d0;
        out <= 'd0;
    end
    else begin
        case(state)
            //s1 : begin out <= d;      input_grant<='d1; r_d <= d; state<= s3;end
            //s3 : begin out <= r_d*3;  input_grant<='d0;           state<= s7;end
            //s7 : begin out <= r_d*7;  input_grant<='d0;           state<= s8;end
            //s8 : begin out <= r_d*8;  input_grant<='d0;           state<= s1;end
            //default:begin input_grant<='d0;out <= 'd0;state<= s1;r_d <= 'd0;end

            s1 : begin out <= d;      input_grant<='d1; r_d <= d; state<= s3;end
            s3 : begin out <= (r_d<<1)+r_d;  input_grant<='d0;           state<= s7;end
            s7 : begin out <= (r_d<<3)-r_d;  input_grant<='d0;           state<= s8;end
            s8 : begin out <= r_d<<3;  input_grant<='d0;           state<= s1;end
            //default:begin input_grant<='d0;out <= 'd0;state<= s1;r_d <= 'd0;end
        endcase
    end
end



//*************code***********//
endmodule