题解 | #自动贩售机1#

`timescale 1ns/1ns
module seller1(
	input wire clk  ,
	input wire rst  ,
	input wire d1 ,
	input wire d2 ,
	input wire d3 ,
	
	output reg out1,
	output reg [1:0]out2
);
//*************code***********//
localparam IDEL  = 3'd0;
localparam GET05 = 3'd1;
localparam GET10 = 3'd2;
localparam GET15 = 3'd3;
localparam GET20 = 3'd4;
localparam GET25 = 3'd5;
localparam GET30 = 3'd6;

reg [2:0] STATE_CURR, STATE_NEXT;
always@(posedge clk or negedge rst)begin
	if(!rst)
		STATE_CURR <= IDEL;
	else
		STATE_CURR <= STATE_NEXT;
end

always@(*)case(STATE_CURR)
	IDEL :
		if(d1)
			STATE_NEXT <= GET05;
		else if(d2)
			STATE_NEXT <= GET10;
		else if(d3)
			STATE_NEXT <= GET20;
		else
			STATE_NEXT <= STATE_NEXT;
	GET05 :
		if(d1)
			STATE_NEXT <= GET10;
		else if(d2)
			STATE_NEXT <= GET15;
		else if(d3)
			STATE_NEXT <= GET25;
		else
			STATE_NEXT <= STATE_NEXT;
	GET10  :
		if(d1)
			STATE_NEXT <= GET15;
		else if(d2)
			STATE_NEXT <= GET20;
		else if(d3)
			STATE_NEXT <= GET30;
		else
			STATE_NEXT <= STATE_NEXT;
	default :
		STATE_NEXT <= IDEL;
endcase

// 饮料
always@(posedge clk or negedge rst)begin
	if(!rst)
		out1 <= 1'b0;
	else if(STATE_NEXT >= 3'd3)
		out1 <= 1'b1;
	else
		out1 <= 1'b0;
end

// 零钱
always@(posedge clk or negedge rst)begin
	if(!rst)
		out2 <= 2'd0;
	else if(STATE_NEXT == GET20)
		out2 <= 2'd1;
	else if(STATE_NEXT == GET25)
		out2 <= 2'd2;
	else if(STATE_NEXT == GET30)
		out2 <= 2'd3;
	else
		out2 <= 2'd0;
end
//*************code***********//
endmodule

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