题解 | #位拆分与运算#

`timescale 1ns/1ns

module data_cal(
input clk,
input rst,
input [15:0]d,
input [1:0]sel,

output reg [4:0]out,
output reg validout
);
//*************code***********//

    reg [15:0] d_tmp;
    always@(posedge clk, negedge rst)
        if(rst == 1'b0)
            d_tmp <= 16'b0;
        else if(sel == 2'b0)
            d_tmp <= d;

    //assign validout = (sel == 2'b0)? 1'b0 : 1'b1;
    //assign out = (sel == 2'd0)? 5'b0:
    //             (sel == 2'd1)? d_tmp[3:0] + d_tmp[7:4] :
    //             (sel == 2'd2)? d_tmp[3:0] + d_tmp[11:8] :
    //             (sel == 2'd3)? d_tmp[3:0] + d_tmp[15:12] : 5'b0;

    always @ (*) begin
        if (rst == 1'b0) begin
            validout = 1'b0;
            out = 5'b0;
        end
        else begin
            case(sel)
                0: begin validout = 1'b0; out = 5'b0; end
                1: begin validout = 1'b1; out = d_tmp[3:0] + d_tmp[7:4]; end
                2: begin validout = 1'b1; out = d_tmp[3:0] + d_tmp[11:8]; end
                3: begin validout = 1'b1; out = d_tmp[3:0] + d_tmp[15:12]; end
            endcase
        end
    end
//*************code***********//
endmodule