题解 | #RAM的简单实现#
RAM的简单实现
https://www.nowcoder.com/practice/2c17c36120d0425289cfac0855c28796
`timescale 1ns/1ns module ram_mod( input clk, input rst_n, input write_en, input [7:0]write_addr, input [3:0]write_data, input read_en, input [7:0]read_addr, output reg [3:0]read_data ); //ram存储空间定义,深度为8,位宽为4 reg [3:0]ram[7:0]; integer i; always@(posedge clk or negedge rst_n)begin if(!rst_n)begin//ram初始化 for(i=0;i<=7;i=i+1)begin ram[i] <= 4'b0000; end read_data <= 4'b0000; end if(write_en)begin//写使能 ram[write_addr] <= write_data; end if(read_en)begin//读使能 read_data <= ram[read_addr]; end end endmodule