题解 | #占空比50%的奇数分频#
占空比50%的奇数分频
https://www.nowcoder.com/practice/ccfba5e5785f4b3f9d7ac19ab13d6b31
`timescale 1ns/1ns
module odo_div_or
(
input wire rst ,
input wire clk_in,
output wire clk_out7
);
//*************code***********//
reg [3:0] cnt;
always @(posedge clk_in or negedge clk_in or negedge rst) begin
if(~rst) begin
cnt <= 0;
end
else if(cnt == 13)begin
cnt <= 0;
end
else begin
cnt <= cnt + 1;
end
end
assign clk_out7 = (cnt < 7)? 0: 1;
//*************code***********//
endmodule
#FPGA#module odo_div_or
(
input wire rst ,
input wire clk_in,
output wire clk_out7
);
//*************code***********//
reg [3:0] cnt;
always @(posedge clk_in or negedge clk_in or negedge rst) begin
if(~rst) begin
cnt <= 0;
end
else if(cnt == 13)begin
cnt <= 0;
end
else begin
cnt <= cnt + 1;
end
end
assign clk_out7 = (cnt < 7)? 0: 1;
//*************code***********//
endmodule
